EP1810LC-25T vs EP1810LC-20 比較
詳細並排比較 EP1810LC-25T 由 Intel 與 EP1810LC-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1810LC-25T | EP1810LC-20 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Altera Classic EP1810 | Classic EPLD |
| Device Type | EPLD (Erasable/OTP Complex PLD) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 48 (4 quadrants x 12 macrocells) | 48 |
| Usable Gates | Approx. 900 | 900 |
| Dedicated Inputs | 16 | 12 |
| Bidirectional I/O Pins | 48 | — |
| External Clocks | 4 | — |
| Propagation Delay (tPD) | 25 ns | 20 ns |
| Supply Voltage (VCC) | 5 V nominal | — |
| 工作溫度 | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| 封裝 | 28-pin J-lead PLCC (Plastic Leaded Chip Carrier) | 68-pin PLCC |
| 安裝類型 | Surface Mount | Surface Mount |
| Technology | CMOS, UV-erasable / OTP | CMOS EPROM |
| I/O Standard | TTL-compatible 5 V | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - confirm with manufacturer] | [DATA_NEEDED: rohs status] |
| Programming Tool | Altera MAX+PLUS II / Quartus Classic | — |
| Maximum Operating Frequency | — | 50 MHz |
| 供應電壓 | — | 5 V (4.75 V to 5.25 V) |
| Programmability | — | UV-Erasable / OTP |
| Package Suffix | — | LC (PLCC, windowed for UV erase on L variant) |
| Speed Grade | — | 20 ns (commercial) |