EP1810LC-35T vs EP1810LC-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1810LC-35T sa pamamagitan ng Intel at EP1810LC-20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1810LC-35T | EP1810LC-20 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | EP1810 Classic EPLD | — |
| Product Type | Erasable Programmable Logic Device (EPLD) | — |
| Usable Gates | 900 | 900 |
| Macro Cells | 48 | — |
| Pin-to-Pin Delay (tpd) | 35 ns | — |
| Maximum Frequency (fmax) | 28.6 MHz | — |
| Supply Voltage (Vcc) | 5 V | — |
| Technology | CMOS | CMOS EPROM |
| Logic Compatibility | 100% TTL emulation | — |
| Packhaging | 68-pin PLCC (Plastic Leaded Chip Carrier) | 68-pin PLCC |
| Package Suffix | T = Tape and Reel | LC (PLCC, windowed for UV erase on L variant) |
| Temperature na Operasyon | 0 C to +70 C (Commercial) | 0C to +70C (commercial) |
| Uri ng Pagpapasok | Surface Mount (PLCC socket or direct solder) | Surface Mount |
| Programming Method | UV-erasable (ceramic) / OTP (plastic); MAX+PLUS II | — |
| Tindminan RoHS | Non-compliant (legacy PLCC product) | [DATA_NEEDED: rohs status] |
| Logic Family Replacement Target | 74LS low-power Schottky TTL | — |
| Family | — | Classic EPLD |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 48 |
| Maximum Operating Frequency | — | 50 MHz |
| Propagation Delay (tPD) | — | 20 ns |
| Volte ng Pagbibigay | — | 5 V (4.75 V to 5.25 V) |
| Programmability | — | UV-Erasable / OTP |
| Dedicated Inputs | — | 12 |
| Speed Grade | — | 20 ns (commercial) |