EP1M120B484C6 vs EP1M120B484C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M120B484C6 sa pamamagitan ng Intel at EP1M120B484C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M120B484C6 | EP1M120B484C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Mercury (ACEX 1M) | Mercury |
| Logic Elements (typical) | 120 LE | — |
| Maximum Logic Elements | [DATA_NEEDED: maximum logic elements] | — |
| Flip-Flops | 4,800 | — |
| User I/O Pins (max) | 303 | — |
| Configuration Memory | SRAM-based (volatile, re-load on power-up) | — |
| Packhaging | 484-ball FineLine BGA (BGA-484) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Peak Reflow Temperature | 220 °C | 220 C |
| Operating Temperature Grade | Commercial (C suffix) | — |
| Process Node | 0.18 µm | 0.13 µm |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Configuration Modes | PS, AS, JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Design Software | Quartus II (legacy support required) | — |
| Logic Elements | — | 49,152 |
| Embedded Memory (bits) | — | 4,800 Kbit (4,800 Kb / 600 KB) |
| User I/O Pins | — | 303 |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Core Voltage | — | 1.5 V |
| Package Type | — | 484-ball FineLine BGA (FCBGA) |
| Temperature na Operasyon | — | [DATA_NEEDED: operating temp range] |
| Configuration Method | — | SRAM / JTAG / Passive Serial |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (multi-standard I/O) |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Device | — | EPC2 / EPC4 compatible |
| Design Tool | — | Quartus II (legacy version) |