EP1M120B484C6 vs EP1M120B484C7 比較
詳細並排比較 EP1M120B484C6 由 Intel 與 EP1M120B484C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1M120B484C6 | EP1M120B484C7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Mercury (ACEX 1M) | Mercury |
| Logic Elements (typical) | 120 LE | — |
| Maximum Logic Elements | [DATA_NEEDED: maximum logic elements] | — |
| Flip-Flops | 4,800 | — |
| User I/O Pins (max) | 303 | — |
| Configuration Memory | SRAM-based (volatile, re-load on power-up) | — |
| 封裝 | 484-ball FineLine BGA (BGA-484) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Peak Reflow Temperature | 220 °C | 220 C |
| Operating Temperature Grade | Commercial (C suffix) | — |
| Process Node | 0.18 µm | 0.13 µm |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Configuration Modes | PS, AS, JTAG | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Design Software | Quartus II (legacy support required) | — |
| Logic Elements | — | 49,152 |
| Embedded Memory (bits) | — | 4,800 Kbit (4,800 Kb / 600 KB) |
| User I/O Pins | — | 303 |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Core Voltage | — | 1.5 V |
| Package Type | — | 484-ball FineLine BGA (FCBGA) |
| 工作溫度 | — | [DATA_NEEDED: operating temp range] |
| Configuration Method | — | SRAM / JTAG / Passive Serial |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (multi-standard I/O) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Device | — | EPC2 / EPC4 compatible |
| Design Tool | — | Quartus II (legacy version) |