EP1M350F780I6N vs EP1M350F780C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1M350F780I6N sa pamamagitan ng Altera at EP1M350F780C8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1M350F780I6N | EP1M350F780C8 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Mercury | — |
| Family | Mercury Family FPGA | — |
| Equivalent Gates | 350K | — |
| Logic Cells / Elements | 14,400 | — |
| Logic Array Blocks (LABs) | 1,440 | — |
| Total RAM Bits | 114,688 | — |
| User I/Os | 486 | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| Transceiver Data Rate | Up to 1.25 Gbps (with CDR) | — |
| Logic Family / Process | CMOS | — |
| Package Type | 780-FBGA (FineLine BGA, FINE LINE) | — |
| Package Dimensions | 29 mm x 29 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | -40 °C to +85 °C (industrial, I6) | 0C to +85C (commercial) |
| Level ng MSL | 3 | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | [DATA_NEEDED: rohs_status] | unknown (legacy device) |
| Architecture | LUT-based, high-speed optimized | — |
| Device Family | — | Altera APEX Mercury (EP1M) |
| Typical Gates | — | 350,000 |
| Maximum Logic Elements (LEs) | — | 12,160 |
| Embedded RAM Blocks | — | 4 dual-port RAM blocks |
| Packhaging | — | 780-ball FineLine BGA |
| Speed Grade | — | C8 (commercial, speed bin 8) |
| Supply Voltage (Core) | — | [DATA_NEEDED: core Vcc] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) |
| Global Clock Networks | — | 8 |
| Configuration Interface | — | IEEE 1532 / passive serial / JTAG |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| In-System Programmability | — | Yes (ISP via JTAG) |