EP1S10B672C7N vs EP1S10B672C7 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10B672C7N sa pamamagitan ng Intel at EP1S10B672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Intel
EP1S10B672C7 EP1S10B672C7 - Stratix 10570 LEs FPGA, 672-BGA | Intel

EP1S10B672C7 - Stratix 10570 LEs FPGA, 672-BGA | Intel

EP1S10B672C7 ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EP1S10B672C7N EP1S10B672C7
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Manufacturer Intel / Altera Intel (formerly Altera)
Product Family Stratix —
Logic Family CMOS CMOS
Logic Elements/Cells 10570 cells —
Maximum Internal Clock 420.17 MHz —
Core Supply Voltage 1.5 V —
Technology Node 130 nm —
Package Code BGA —
Number of Terminals 672 —
Package Body Size 35 x 35 mm —
Ball Pitch 1.27 mm 1.27 mm
Package Shape Square —
Temperature Grade Commercial extended, 0 to 85 C Commercial (C)
Terminal Form Ball —
Configuration/JTAG JTAG boundary-scan per Stratix family data sheet —
Number of User I/O in 672-BGA [DATA_NEEDED: user I/O count] —
Total RAM Bits [DATA_NEEDED: total RAM bits] —
Embedded PLLs [DATA_NEEDED: PLL count] —
Config Device Compatibility [DATA_NEEDED: supported configuration devices] —
RoHS unknown - N suffix may indicate Pb-free, not verified in fetched data —
Series — Stratix
Logic Elements — 10,570
Embedded Memory (Total) — 920 Kbits
DSP Blocks — Yes (DSP multiplier blocks)
Maximum User I/O Pins — [DATA_NEEDED: maximum user I/O count]
Process Technology — 0.13 µm CMOS
Supply Voltage (Core) — 1.5 V
Package Type — 672-ball FineLine BGA
Package Dimensions — 35 x 35 mm
Temperature na Operasyon — 0 °C to 85 °C (Commercial)
Speed Grade — 7
Configuration Method — JTAG / EPC serial configuration
Tindminan RoHS — [DATA_NEEDED: RoHS compliance]
Uri ng Pagpapasok — Surface Mount

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