EP1S10F672C7N vs EP1S10F672C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S10F672C7N sa pamamagitan ng Altera at EP1S10F672C6 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S10F672C7N | EP1S10F672C6 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | Stratix | Stratix® I |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | 6 |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Voltage | 1.5 V | 1.5 V |
| Maximum Operating Frequency | 420.17 MHz | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0C to +85C (Commercial) |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Family | — | Stratix FPGA |
| Logic Elements (LE) | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1057 |
| Total Memory Bits | — | 920,448 bits |
| Embedded Memory | — | TriMatrix (MRAM/M4K) |
| Number of I/Os | — | 345 |
| Number of PLLs | — | 12 (6 per device side) |
| Packhaging | — | 672-ball FineLine BGA (FBGA) |
| Maximum Core Frequency | — | 420.17 MHz |
| Configuration Modes | — | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |