EP1S25F1020C6N vs EP1S30F1020C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S25F1020C6N sa pamamagitan ng Altera at EP1S30F1020C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S25F1020C6N | EP1S30F1020C7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix | Stratix (1.5 V core) |
| Logic Elements (LE) | 25,660 | — |
| Logic Cells | 25,660 | — |
| Embedded Memory (bits) | 1,944,576 | — |
| User I/O Pins | 706 | — |
| LABs (Logic Array Blocks) | 2,566 | 3247 |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | 1.5 V | — |
| Packhaging | 1020-ball FC-FBGA (33 x 33 mm, 1.0 mm pitch) | — |
| Maximum Internal Clock Frequency | 450.05 MHz | — |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 C to +85 C (commercial extended) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Configuration Method | JTAG or EPC configuration device | — |
| Family Generation | Stratix (1st generation) | — |
| Series | — | Stratix |
| Logic Elements | — | 32,470 |
| Total Block RAM Bits | — | 3,317,184 |
| User I/O Count | — | 726 |
| Max Internal Frequency | — | 420.17 MHz |
| Core Supply Voltage | — | 1.5 V (1.425 V to 1.575 V) |
| Package Type | — | 1020-ball FineLine BGA (FC-FBGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Level ng MSL | — | 3 (168 hours) |
| Peak Reflow Temperature Max Time | — | 40 s |