EP1S30B956C6 vs EP1S80B956C6AA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S30B956C6 sa pamamagitan ng Altera at EP1S80B956C6AA sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S30B956C6 | EP1S80B956C6AA |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 32,470 | — |
| Logic Array Blocks (LABs) | 3,247 | — |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | — |
| Maximum User I/O | 683 | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | Commercial (0C to +85C) - inferred from C6 suffix |
| Speed Grade | C6 | C6 |
| Packhaging | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | 956-BGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | — |
| DSP Blocks | Yes (Stratix DSP blocks) | [DATA_NEEDED: DSP block count] |
| PLLs | Up to 12 | 6 |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | — |
| Tindminan RoHS | Not confirmed - pre-RoHS part | Lead free / RoHS Compliant |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free | Unknown | — |
| Process Node | — | 130 nm |
| Logic Elements | — | 79,040 |
| M4K RAM Blocks | — | 742 |
| Total Embedded Memory | — | [DATA_NEEDED: total embedded memory bits] |
| User I/O Pins | — | 683 |
| I/O Voltage (VCCIO) | — | MultiVolt (1.5 V, 1.8 V, 2.5 V, 3.3 V) |
| Configuration Scheme | — | Active Serial / Passive Serial / JTAG |
| Legacy Status | — | Obsolete - Mult Device EOL 1/Jun/2017 |