EP1S30B956C6 vs EP1S80B956C6AA 比較
詳細並排比較 EP1S30B956C6 由 Altera 與 EP1S80B956C6AA 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S30B956C6 | EP1S80B956C6AA |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 32,470 | — |
| Logic Array Blocks (LABs) | 3,247 | — |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | — |
| Maximum User I/O | 683 | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| 工作溫度 | 0 C to 85 C (Commercial) | Commercial (0C to +85C) - inferred from C6 suffix |
| Speed Grade | C6 | C6 |
| 封裝 | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | 956-BGA |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | — |
| DSP Blocks | Yes (Stratix DSP blocks) | [DATA_NEEDED: DSP block count] |
| PLLs | Up to 12 | 6 |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | — |
| RoHS 狀態 | Not confirmed - pre-RoHS part | Lead free / RoHS Compliant |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Lead-Free | Unknown | — |
| Process Node | — | 130 nm |
| Logic Elements | — | 79,040 |
| M4K RAM Blocks | — | 742 |
| Total Embedded Memory | — | [DATA_NEEDED: total embedded memory bits] |
| User I/O Pins | — | 683 |
| I/O Voltage (VCCIO) | — | MultiVolt (1.5 V, 1.8 V, 2.5 V, 3.3 V) |
| Configuration Scheme | — | Active Serial / Passive Serial / JTAG |
| Legacy Status | — | Obsolete - Mult Device EOL 1/Jun/2017 |