EP1SGX25DF1020C6ES vs EP1SGX25DF1020C6ESL Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF1020C6ES sa pamamagitan ng Altera at EP1SGX25DF1020C6ESL sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX25DF1020C6ES - Stratix GX FPGA, 25K LE, FBGA-1020 | Altera
EP1SGX25DF1020C6ES ⚠ Huling PagbiliAltera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL ObsoletePagsanggunian na paghahambing
| Parametro | EP1SGX25DF1020C6ES | EP1SGX25DF1020C6ESL |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25660 cells | 25,660 |
| Configurable Logic Blocks (CLBs) | 2566 | — |
| Maximum User I/Os | 607 | — |
| Number of LABs/CLBs | 2566 | — |
| Total RAM Bits | [DATA_NEEDED: total RAM bits] | 1,944,576 bits |
| Temperature na Operasyon | 0 C to 85 C | — |
| Supply Voltage (Core) | 1.5 V | — |
| Process Technology | 130 nm CMOS | — |
| Logic Family | CMOS | — |
| Packhaging | FBGA-1020, 33 mm × 33 mm, 1.00 mm pitch | 1020-BBGA (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Lead-Free | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: confirm RoHS] | [DATA_NEEDED: RoHS status] |
| Configuration Interface | JTAG / Passive Serial / Passive Parallel | — |
| Embedded Transceivers | Yes (multi-gigabit) | — |
| DSP Blocks | Yes | Yes (embedded DSP blocks) |
| User I/O Pins | — | 607 |
| LABs/CLBs | — | 2,566 |
| Core Voltage | — | 1.5 V |
| Temperature ng Junction na Operasyon | — | 0 C to 85 C |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Process Node | — | 0.13 um CMOS |
| Transceivers | — | Embedded multi-gigabit transceivers (per Stratix GX family) |
| Speed Grade | — | C6 |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) |