EP1SGX25DF672C6N vs EP1SGX25DF672I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF672C6N sa pamamagitan ng Intel at EP1SGX25DF672I5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP1SGX25DF672C6N - Stratix GX FPGA, 25K LE, 672-FBGA | Intel (Altera)
EP1SGX25DF672C6N ObsoleteIntel
EP1SGX25DF672I5N - Stratix GX FPGA, 25.6K LE, 3.1875Gbps SERDES
EP1SGX25DF672I5N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX25DF672C6N | EP1SGX25DF672I5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | Stratix GX | — |
| Family | Stratix GX (Stratix I GX) | Stratix GX |
| Logic Elements / Cells | 25,660 | — |
| Logic Array Blocks (LABs) | 2,566 | — |
| User I/O Count | 455 | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Logic Family | CMOS | CMOS (SRAM-based FPGA) |
| Packhaging | FBGA-672 (FC-FBGA), 33 x 33 mm, 1.0 mm pitch | 672-ball FC-FBGA |
| Temperature na Operasyon | 0C to 85C (commercial) | -40C to +85C (Industrial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (168 hours) | — |
| HTSUS Code | 8542.39.0001 | — |
| Tindminan RoHS | Lead Free (per part suffix 'N' designator) | Compliant |
| Bilang ng Pin | 672 | — |
| Logic Elements | — | 25,660 |
| Logic Cells (CLBs) | — | 2,566 |
| High-Speed Transceiver Channels | — | 4 to 20 (CDR/SERDES) |
| Max Transceiver Data Rate | — | 3.1875 Gbps |
| Package Body Size | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Lead-Free | — | Yes |
| Total I/O Pins | — | [DATA_NEEDED: total user I/O pin count] |
| Embedded Memory | — | [DATA_NEEDED: TriMatrix memory block count] |