EP1SGX25DF672C6N vs EP1SGX25DF800C5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF672C6N sa pamamagitan ng Intel at EP1SGX25DF800C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1SGX25DF672C6N EP1SGX25DF800C5N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Series Stratix GX —
Family Stratix GX (Stratix I GX) Stratix GX
Logic Elements / Cells 25,660 —
Logic Array Blocks (LABs) 2,566 —
User I/O Count 455 —
Core Supply Voltage 1.5 V —
Process Technology 130 nm CMOS 130 nm
Logic Family CMOS —
Packhaging FBGA-672 (FC-FBGA), 33 x 33 mm, 1.0 mm pitch FBGA-800 (FineLine BGA, 31x31 mm)
Temperature na Operasyon 0C to 85C (commercial) 0C to +85C (commercial)
Uri ng Pagpapasok Surface Mount Surface Mount (BGA)
Level ng MSL 3 (168 hours) [DATA_NEEDED: MSL Level]
HTSUS Code 8542.39.0001 —
Tindminan RoHS Lead Free (per part suffix 'N' designator) —
Bilang ng Pin 672 —
Device Logic Elements — 25,660 (typical)
Transceiver Channels — 8 (full-duplex)
Maximum Transceiver Data Rate — 3.1875 Gbps per channel
Supply Voltage (Core) — 1.5 V typical
Speed Grade — C5 (commercial)
Lead-Free / RoHS Status — Lead-free (N suffix)
On-Chip Memory (TriMatrix) — Approx. 2 Mbits total
PLLs — Up to 40 (device-wide)
Embedded 8b/10b Encoder/Decoder — Yes (one per transceiver channel)
PCI Express Hard IP — x1, x4 endpoints supported
DSP Blocks — Embedded multiplier blocks (family-wide)
Development Software — Quartus II (legacy)

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