EP1SGX25DF672C6N vs EP1SGX25DF800C5N Comparison

Detailed side-by-side comparison of EP1SGX25DF672C6N by Intel and EP1SGX25DF800C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1SGX25DF672C6N EP1SGX25DF800C5N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $210.00 $158.00
Series Stratix GX β€”
Family Stratix GX (Stratix I GX) Stratix GX
Logic Elements / Cells 25,660 β€”
Logic Array Blocks (LABs) 2,566 β€”
User I/O Count 455 β€”
Core Supply Voltage 1.5 V β€”
Process Technology 130 nm CMOS 130 nm
Logic Family CMOS β€”
Package FBGA-672 (FC-FBGA), 33 x 33 mm, 1.0 mm pitch FBGA-800 (FineLine BGA, 31x31 mm)
Operating Temperature 0C to 85C (commercial) 0C to +85C (commercial)
Mounting Type Surface Mount Surface Mount (BGA)
MSL Level 3 (168 hours) [DATA_NEEDED: MSL Level]
HTSUS Code 8542.39.0001 β€”
RoHS Status Lead Free (per part suffix 'N' designator) β€”
Pin Count 672 β€”
Device Logic Elements β€” 25,660 (typical)
Transceiver Channels β€” 8 (full-duplex)
Maximum Transceiver Data Rate β€” 3.1875 Gbps per channel
Supply Voltage (Core) β€” 1.5 V typical
Speed Grade β€” C5 (commercial)
Lead-Free / RoHS Status β€” Lead-free (N suffix)
On-Chip Memory (TriMatrix) β€” Approx. 2 Mbits total
PLLs β€” Up to 40 (device-wide)
Embedded 8b/10b Encoder/Decoder β€” Yes (one per transceiver channel)
PCI Express Hard IP β€” x1, x4 endpoints supported
DSP Blocks β€” Embedded multiplier blocks (family-wide)
Development Software β€” Quartus II (legacy)

Datasheets & Resources

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