EP1SGX25DF800I6N vs EP1SGX25DF800C5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF800I6N sa pamamagitan ng Intel at EP1SGX25DF800C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1SGX25DF800I6N EP1SGX25DF800C5N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili Obsolete
Family Stratix GX Stratix GX
Logic Elements [DATA_NEEDED: logic element count] —
Transceiver Channels 4 to 20 channels 8 (full-duplex)
Maximum Transceiver Data Rate 3.1875 Gbps per channel 3.1875 Gbps per channel
CDR / SERDES Embedded clock-data recovery and SERDES —
Memory TriMatrix memory, up to 2 Mbits —
DSP Blocks Up to 22 DSP blocks Embedded multiplier blocks (family-wide)
Hard IP PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) —
Source-Synchronous Channels 8 channels —
I/O Standards LVDS, LVTTL, LVCMOS, SSTL, HSTL —
Packhaging 800-pin FineLine BGA (DF800) FBGA-800 (FineLine BGA, 31x31 mm)
Speed Grade -6 (production grade) C5 (commercial)
Temperature Range Industrial -40C to +100C —
Tindminan RoHS [DATA_NEEDED: RoHS status] —
Protocol Support Gigabit Ethernet, SONET/SDH, PCI Express, custom serial —
Device Logic Elements — 25,660 (typical)
Process Technology — 130 nm
Supply Voltage (Core) — 1.5 V typical
Temperature na Operasyon — 0C to +85C (commercial)
Lead-Free / RoHS Status — Lead-free (N suffix)
On-Chip Memory (TriMatrix) — Approx. 2 Mbits total
PLLs — Up to 40 (device-wide)
Embedded 8b/10b Encoder/Decoder — Yes (one per transceiver channel)
PCI Express Hard IP — x1, x4 endpoints supported
Uri ng Pagpapasok — Surface Mount (BGA)
Level ng MSL — [DATA_NEEDED: MSL Level]
Development Software — Quartus II (legacy)

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