EP1SGX25DF800I6N vs EP1SGX25DF800C5N 比較

詳細並排比較 EP1SGX25DF800I6N 由 Intel 與 EP1SGX25DF800C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1SGX25DF800I6N EP1SGX25DF800C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family Stratix GX Stratix GX
Logic Elements [DATA_NEEDED: logic element count] —
Transceiver Channels 4 to 20 channels 8 (full-duplex)
Maximum Transceiver Data Rate 3.1875 Gbps per channel 3.1875 Gbps per channel
CDR / SERDES Embedded clock-data recovery and SERDES —
Memory TriMatrix memory, up to 2 Mbits —
DSP Blocks Up to 22 DSP blocks Embedded multiplier blocks (family-wide)
Hard IP PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II) —
Source-Synchronous Channels 8 channels —
I/O Standards LVDS, LVTTL, LVCMOS, SSTL, HSTL —
封裝 800-pin FineLine BGA (DF800) FBGA-800 (FineLine BGA, 31x31 mm)
Speed Grade -6 (production grade) C5 (commercial)
Temperature Range Industrial -40C to +100C —
RoHS 狀態 [DATA_NEEDED: RoHS status] —
Protocol Support Gigabit Ethernet, SONET/SDH, PCI Express, custom serial —
Device Logic Elements — 25,660 (typical)
Process Technology — 130 nm
Supply Voltage (Core) — 1.5 V typical
工作溫度 — 0C to +85C (commercial)
Lead-Free / RoHS Status — Lead-free (N suffix)
On-Chip Memory (TriMatrix) — Approx. 2 Mbits total
PLLs — Up to 40 (device-wide)
Embedded 8b/10b Encoder/Decoder — Yes (one per transceiver channel)
PCI Express Hard IP — x1, x4 endpoints supported
安裝類型 — Surface Mount (BGA)
MSL 等級 — [DATA_NEEDED: MSL Level]
Development Software — Quartus II (legacy)

資料表與資源

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