EP1SGX40F1020 vs EP1SGX40FF1020C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX40F1020 sa pamamagitan ng Altera at EP1SGX40FF1020C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA
EP1SGX40FF1020C7 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP1SGX40F1020 | EP1SGX40FF1020C7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix GX | Stratix GX (EP1SGX40) |
| Logic Elements | 41,250 | — |
| Embedded Memory Bits | 3,423,744 | — |
| Total RAM Bits | 3,423,744 | — |
| User I/O Pins | 624 | 624 |
| Number of LABs/CLBs | 4125 | — |
| Number of Transceivers | 20 | — |
| Transceiver Data Rate | 600 Mbps to 3.1875 Gbps | — |
| Packhaging | 1020-BBGA (FineLine BGA) | 1020-ball FC-FBGA (S-PBGA-B1020) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: industrial/commercial grade] | — |
| Volte ng Pagbibigay | [DATA_NEEDED: core and I/O voltage] | — |
| Configuration Mode | SRAM-based LUT | — |
| JTAG Boundary Scan | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: confirm from manufacturer page] | Compliant |
| Series | — | Stratix GX |
| Logic Elements (LE) | — | 41,250 |
| Configurable Logic Blocks (CLB) | — | 4,125 |
| Embedded Memory (bits) | — | 3,423,744 |
| Number of Logic Array Blocks (LAB) | — | 4,125 |
| Number of I/O Banks | — | 12 |
| Core Supply Voltage (VCCINT) | — | 1.425 V to 1.575 V (nominal 1.5 V) |
| Speed Grade | — | 7 (-7, mid-speed) |
| Process Technology | — | CMOS |
| Temperature na Operasyon | — | 0 °C to 85 °C (commercial) |
| Package Dimensions | — | 33 mm × 33 mm |
| Ball Pitch | — | 1.00 mm |
| Configuration Modes | — | PS, PPS, PPA, JTAG, AS |
| DSP Blocks (9-bit) | — | 176 |
| Transceiver Channels | — | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps |
| PLLs | — | 8 enhanced + per-transceiver PLLs |