EP20K100CF144C7ES vs EP20K100CF144C7 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CF144C7ES sa pamamagitan ng Intel at EP20K100CF144C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K100CF144C7ES EP20K100CF144C7
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family APEX-20K APEX-20K Field Programmable Gate Array
Typical Gates 100,000 —
Logic Elements 4,160 —
Embedded Memory (RAM bits) 53,248 —
User I/O Pins 93 —
DLLs / Clock Management 4 DLLs —
Packhaging 144-LQFP (20x20 mm) —
Uri ng Pagpapasok Surface Mount Surface Mount
Speed Grade C7 (commercial, mid-speed) C7 (commercial)
Temperature na Operasyon 0C to +85C (commercial) 0C to +85C (commercial)
Core Voltage 1.8 V (typical APEX-20K VCCINT) —
I/O Voltage Reference MultiVolt I/O - 3.3 V / 5 V tolerant —
Architecture MultiCore (LUT + Embedded System Blocks) —
Programming File Format Quartus II / MAX+PLUS II SOF / POF —
Variant Suffix ES (engineering sample / special order) —
Level ng MSL [DATA_NEEDED: MSL Level] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Series — APEX-20K
Logic Elements / Cells — 4,160
Total RAM Bits — 53,248
Number of Logic Elements — 4,160
Number of I/O — 93
Number of Gates — 100,000 system gates
Voltage - Supply — 1.8 V core, 3.3 V I/O (typical APEX-20K rails)
Packhaging / Kaso — 144-LQFP
Package Dimensions — 22 x 22 mm, 0.5 mm pitch
Process Technology — 0.18 micron CMOS SRAM
Configuration Mode — Passive Serial, JTAG (IEEE 1149.1)
PLLs — 4 (per APEX-20K family architecture)

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