EP20K100CQ240C7 vs EP20K100CQ240C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100CQ240C7 sa pamamagitan ng Altera at EP20K100CQ240C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100CQ240C7 | EP20K100CQ240C8 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX-20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 100,000 | — |
| Logic Elements | 53,248 | 4,160 |
| Embedded Memory Bits | 4,160 | — |
| Maximum User I/O Pins | 189 | — |
| Package Type | 240-BFQFP | — |
| Speed Grade | C7 | C8 (commercial, -8) |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Supply Voltage - Core | [DATA_NEEDED: core voltage] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL (per family datasheet) | — |
| Number of PLLs | 4 (per APEX-20K family datasheet) | — |
| Embedded System Blocks (ESBs) | Yes (per APEX-20K family) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera Quartus / MAX+PLUS II (per family) | — |
| Series | — | EP20K100 |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Embedded Memory (ESB) | — | 53,248 bits |
| User I/O Pins | — | 189 |
| Packhaging | — | 240-pin PQFP (QFP) |
| Core Voltage | — | 2.5 V |
| I/O Standards | — | LVTTL, LVCMOS, PCI |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial/parallel |
| Programming Method | — | SRAM-based, in-system programmable |