EP20K100FC324-1V vs EP20K60EFC324-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K100FC324-1V sa pamamagitan ng Intel at EP20K60EFC324-2N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K100FC324-1V | EP20K60EFC324-2N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX-20K® | APEX-20KE |
| Number of Logic Elements / Cells | 4160 | — |
| Total RAM Bits | 53248 | 32,768 |
| Number of Gates (typical) | 100000 | — |
| Number of I/O | 252 | 196 |
| Number of LABs/CLBs | [DATA_NEEDED: number of Logic Array Blocks] | — |
| Number of EABs | [DATA_NEEDED: number of Embedded Array Blocks] | — |
| Supply Voltage - Core (VCCINT) | 2.375 V to 2.625 V | — |
| Supply Voltage - I/O (VCCIO) | 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard) | — |
| Speed Grade | -1V (commercial) | — |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 324-FBGA (FineLine BGA, 19x19 mm) | 324-BGA (FineLine BGA, 19x19 mm) |
| Supplier Device Package | 324-FBGA | 324-FBGA (19x19) |
| Number of PLLs | 4 | — |
| I/O Standards Supported | LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | MultiCore (LUT + ESB memory + product-term) |
| Programming Interface | JTAG (IEEE 1149.1) / in-system | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | unknown |
| Family | — | APEX 20K |
| Number of Logic Elements/Cells | — | 2,560 |
| Total System Gates | — | 60,000 |
| Number of Logic Array Blocks (LABs/CLBs) | — | 2,560 |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V typ.) |
| Internal Frequency (max) | — | 200 MHz |
| Propagation Delay | — | 1.72 ns |
| Operating Temperature Range (TJ) | — | 0 °C to 85 °C (commercial) |
| Process Technology | — | 0.22 µm CMOS |
| Configuration Method | — | Passive Serial / JTAG (IEEE 1149.1) |