EP20K200CF484C7N vs EP20K200CF484C8ES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200CF484C7N sa pamamagitan ng Altera at EP20K200CF484C8ES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K200CF484C7N - APEX-20K 200K Gates FPGA 484-FBGA | Intel/Altera
EP20K200CF484C7N ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200CF484C7N | EP20K200CF484C8ES |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | APEX-20K | APEX-20KC |
| Logic Elements / Cells | 8,320 | — |
| Total RAM Bits | 106,496 | — |
| Number of Gates (typical) | 200,000 | — |
| Number of I/O | 382 | — |
| Voltage - Supply (VCCINT) | 1.71 V to 1.89 V | — |
| Packhaging / Kaso | 484-BBGA (FineLine BGA) | — |
| Supplier Device Package | 484-FBGA (23x23 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial grade) | 0C to +85C (commercial) |
| Number of PLLs | 4 | — |
| Embedded Array Blocks (EABs) | Configurable as RAM/ROM/FIFO | — |
| Programmable Logic Blocks | APEX LAB architecture | — |
| MultiVolt I/O Support | 1.8V / 2.5V / 3.3V / 5V | — |
| Configuration Method | SRAM-based, in-system reconfigurable | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Katayuan ng Lifecycle | Obsolete (Altera/Intel APEX-20K family EOL) | — |
| Family | — | APEX 20K |
| Logic Elements | — | 8,320 |
| System Gates | — | 200,000 |
| Embedded Memory (RAM bits) | — | 106,496 |
| Number of Logic Array Blocks (LABs) | — | 104 |
| Number of Embedded System Blocks (ESBs) | — | 13 |
| User I/O Pins (max) | — | 376 |
| PLLs | — | 4 |
| Core Voltage | — | 1.8 V |
| Speed Grade | — | C8 (-8 commercial) |
| Packhaging | — | 484-pin FBGA (FineLine BGA) |
| Process Node | — | 0.18 micron CMOS |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Altera serial |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP |
| Lead Free / RoHS | — | [DATA_NEEDED: lead-free status] |