EP20K200CF484C7N vs EP20K200CF484C8ES 比較

詳細並排比較 EP20K200CF484C7N 由 Altera 與 EP20K200CF484C8ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP20K200CF484C8ES EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES - APEX-20KC 200K Gates FPGA | Altera

EP20K200CF484C8ES ⚠ 最後購買機會

規格比較

參數 EP20K200CF484C7N EP20K200CF484C8ES
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Series APEX-20K APEX-20KC
Logic Elements / Cells 8,320 —
Total RAM Bits 106,496 —
Number of Gates (typical) 200,000 —
Number of I/O 382 —
Voltage - Supply (VCCINT) 1.71 V to 1.89 V —
封裝 / 外殼 484-BBGA (FineLine BGA) —
Supplier Device Package 484-FBGA (23x23 mm) —
安裝類型 Surface Mount Surface Mount
工作溫度 0C to +85C (commercial grade) 0C to +85C (commercial)
Number of PLLs 4 —
Embedded Array Blocks (EABs) Configurable as RAM/ROM/FIFO —
Programmable Logic Blocks APEX LAB architecture —
MultiVolt I/O Support 1.8V / 2.5V / 3.3V / 5V —
Configuration Method SRAM-based, in-system reconfigurable —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] —
生命週期狀態 Obsolete (Altera/Intel APEX-20K family EOL) —
Family — APEX 20K
Logic Elements — 8,320
System Gates — 200,000
Embedded Memory (RAM bits) — 106,496
Number of Logic Array Blocks (LABs) — 104
Number of Embedded System Blocks (ESBs) — 13
User I/O Pins (max) — 376
PLLs — 4
Core Voltage — 1.8 V
Speed Grade — C8 (-8 commercial)
封裝 — 484-pin FBGA (FineLine BGA)
Process Node — 0.18 micron CMOS
Configuration Interface — JTAG (IEEE 1149.1) / Altera serial
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL, SSTL, HSTL, AGP
Lead Free / RoHS — [DATA_NEEDED: lead-free status]

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