EP20K200EBC356-1 vs EP20K200CB356C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EBC356-1 sa pamamagitan ng Altera at EP20K200CB356C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200EBC356-1 | EP20K200CB356C7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K (APEX 20KE) | APEX 20KC |
| System Gates | 200,000 | 200,000 |
| Logic Elements / Cells | 8,320 | 8,320 |
| Maximum User I/Os | 277 | — |
| Core Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| Process Technology | 0.22 µm CMOS | 0.15 um CMOS |
| Propagation Delay | 2.5 ns | 1.48 ns |
| Internal Performance | Up to 367 MHz | — |
| Packhaging | 356-ball LBGA (35 x 35 mm) | 356-ball PBGA (S-PBGA) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | 0C to +85C (Commercial) |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| On-chip Memory | Embedded System Blocks (ESB / SRAM) | — |
| Configuration Method | JTAG (ByteBlaster / MasterBlaster), passive serial | — |
| Development Software | Altera Quartus II | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status not stated in verified sources] | unknown |
| Katayuan ng Lifecycle | Obsolete / EOL | — |
| Series | — | EP20K200 |
| Maximum Operating Frequency | — | 3571.6 MHz (internal equivalent) |
| User I/Os | — | 263 |
| Input Terminals | — | 267 |
| Supply Voltage (Nominal) | — | 1.8 V |
| Embedded Memory | — | ESBs (dual-port RAM/ROM/FIFO) |
| Clock Management | — | PLL with up to 4 outputs |
| JTAG Support | — | Yes (IEEE 1149.1) |
| In-System Programmable | — | Yes |