EP20K200EBC356-1 vs EP20K200CB356C7N 比較
詳細並排比較 EP20K200EBC356-1 由 Altera 與 EP20K200CB356C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K200CB356C7N - APEX 20KC FPGA 200K Gates 356-BGA | Intel / Altera
EP20K200CB356C7N Obsolete規格比較
| 參數 | EP20K200EBC356-1 | EP20K200CB356C7N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20K (APEX 20KE) | APEX 20KC |
| System Gates | 200,000 | 200,000 |
| Logic Elements / Cells | 8,320 | 8,320 |
| Maximum User I/Os | 277 | — |
| Core Voltage | 1.8 V (1.71 V to 1.89 V) | — |
| Process Technology | 0.22 µm CMOS | 0.15 um CMOS |
| Propagation Delay | 2.5 ns | 1.48 ns |
| Internal Performance | Up to 367 MHz | — |
| 封裝 | 356-ball LBGA (35 x 35 mm) | 356-ball PBGA (S-PBGA) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| 工作溫度 | 0 °C to 85 °C (Commercial) | 0C to +85C (Commercial) |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| On-chip Memory | Embedded System Blocks (ESB / SRAM) | — |
| Configuration Method | JTAG (ByteBlaster / MasterBlaster), passive serial | — |
| Development Software | Altera Quartus II | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status not stated in verified sources] | unknown |
| 生命週期狀態 | Obsolete / EOL | — |
| Series | — | EP20K200 |
| Maximum Operating Frequency | — | 3571.6 MHz (internal equivalent) |
| User I/Os | — | 263 |
| Input Terminals | — | 267 |
| Supply Voltage (Nominal) | — | 1.8 V |
| Embedded Memory | — | ESBs (dual-port RAM/ROM/FIFO) |
| Clock Management | — | PLL with up to 4 outputs |
| JTAG Support | — | Yes (IEEE 1149.1) |
| In-System Programmable | — | Yes |