EP20K200EBC356-2 vs EP20K100EBC356-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EBC356-2 sa pamamagitan ng Altera at EP20K100EBC356-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K200EBC356-2 | EP20K100EBC356-3N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX 20KE | APEX-20KE |
| Family | APEX 20K (APEX 20KE enhancement) | APEX 20K |
| Typical Gates | 200,000 | — |
| Maximum Logic Elements | 8320 | — |
| Macros / Logic Cells | 832 | — |
| Maximum Flip-Flops | 13,824 | — |
| Embedded RAM | 53,248 bits | — |
| User I/Os | 271 | — |
| Number of Terminals / Pins | 356 (LBGA) | — |
| Propagation Delay | 2.5 ns | 1.6 ns (speed grade -3N) |
| Volte ng Pagbibigay | 2.5 V (core) | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | 0 °C to +85 °C |
| Logic Family | CMOS | — |
| Number of PLLs | 4 embedded PLLs | — |
| Number of DDR Interfaces | 4 | — |
| Package Type | 356-LBGA (EBC suffix) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Speed Grade | -2 | — |
| Compliance | RoHS status [DATA_NEEDED: RoHS] | — |
| Logic Elements / Cells | — | 4160 |
| System Gates | — | 100,000 |
| Embedded Memory (bits) | — | 53,248 |
| Embedded System Blocks (ESBs) | — | 26 |
| Maximum User I/Os | — | 246 |
| Bilang ng Pins | — | 356 |
| Packhaging | — | 356-LBGA (Ball Grid Array) |
| Package Dimensions | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 1.8 V |
| Maximum Internal Frequency | — | 250 MHz |
| Programmable Interface | — | JTAG (IEEE 1149.1) |
| I/O Standards Supported | — | LVCMOS, LVTTL, PCI, SSTL-2/3, GTL+ |
| Tindminan RoHS | — | [DATA_NEEDED: rohs_status] |