EP20K200EBC356-2 vs EP20K100EBC356-3N 对比

详细并排对比 EP20K200EBC356-2 出自 Altera 和 EP20K100EBC356-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K200EBC356-2 EP20K100EBC356-3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $99.50 $92.00
Series APEX 20KE APEX-20KE
Family APEX 20K (APEX 20KE enhancement) APEX 20K
Typical Gates 200,000 —
Maximum Logic Elements 8320 —
Macros / Logic Cells 832 —
Maximum Flip-Flops 13,824 —
Embedded RAM 53,248 bits —
User I/Os 271 —
Number of Terminals / Pins 356 (LBGA) —
Propagation Delay 2.5 ns 1.6 ns (speed grade -3N)
电源电压 2.5 V (core) —
工作温度 0 C to 85 C (commercial) 0 °C to +85 °C
Logic Family CMOS —
Number of PLLs 4 embedded PLLs —
Number of DDR Interfaces 4 —
Package Type 356-LBGA (EBC suffix) —
安装类型 Surface Mount (BGA) Surface Mount
Speed Grade -2 —
Compliance RoHS status [DATA_NEEDED: RoHS] —
Logic Elements / Cells — 4160
System Gates — 100,000
Embedded Memory (bits) — 53,248
Embedded System Blocks (ESBs) — 26
Maximum User I/Os — 246
引脚数 — 356
封装 — 356-LBGA (Ball Grid Array)
Package Dimensions — 45 x 45 mm
Ball Pitch — 1.27 mm
Process Technology — 0.22 µm CMOS
Core Supply Voltage — 1.8 V
Maximum Internal Frequency — 250 MHz
Programmable Interface — JTAG (IEEE 1149.1)
I/O Standards Supported — LVCMOS, LVTTL, PCI, SSTL-2/3, GTL+
RoHS 状态 — [DATA_NEEDED: rohs_status]

数据手册与资源

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