EP20K200EBC652-3N vs EP20K1500EBC652-1X Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200EBC652-3N sa pamamagitan ng Altera at EP20K1500EBC652-1X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K200EBC652-3N EP20K1500EBC652-1X
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Series APEX 20KE (APEX-20KE®) —
Device Family EP20K200 —
System Gates 200,000 1.5 M
Logic Elements / Cells 8,320 51840
Logic Array Blocks (LABs) 832 —
Macrocells 832 —
Embedded RAM 106,496 bits —
User I/Os (DigiKey listing) 376 —
User I/Os (digchip listing) 277 —
Propagation Delay 2.33 ns 1.84 ns
Internal Frequency (max) 189 MHz —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Core Supply Voltage 1.71 V to 1.89 V (nominal 1.8 V) —
I/O Supply (LVDS-capable) LVDS, 2.5 V referenced (per source variant) —
Packhaging 652-ball BGA 652-ball BGA (FCBGA / PBGA652)
Uri ng Pagpapasok Surface Mount Surface Mount
Operating Temperature (TJ) 0 °C to 85 °C (commercial) —
Speed Grade -3 (slowest in APEX 20KE family) —
Configuration JTAG (IEEE 1149.1), Passive Serial —
Tindminan RoHS Compliant [DATA_NEEDED: RoHS compliance]
Family — APEX 20KE
Macros — 3456
Total RAM Bits — 442368
User I/O — 488
Number of I/O Banks — [DATA_NEEDED: I/O bank count]
Internal Frequency — 160 MHz (per digchip) / 400 MHz (per fpgakey)
Core Voltage — 1.8 V
Temperature na Operasyon — 0 °C to +85 °C (commercial)
Level ng MSL — [DATA_NEEDED: MSL rating]
Configuration Method — JTAG / SRAM
Architecture — MultiCore (LUT + product-term)

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