EP20K200RC208-2 vs EP20K200RC208-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K200RC208-2 sa pamamagitan ng Altera at EP20K200RC208-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP20K200RC208-3N - APEX 20K FPGA 200K Gates 8320 Cells 167MHz | Altera
EP20K200RC208-3N ObsoletePagsanggunian na paghahambing
| Parametro | EP20K200RC208-2 | EP20K200RC208-3N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | APEX-20K | APEX 20K |
| Family | APEX-20K MultiCore FPGA | APEX-20K |
| Logic Elements (LEs) | 8320 | — |
| System Gates | 200,000 (typical) | 200,000 |
| Embedded Memory (bits) | 106,496 | — |
| Maximum User I/O | 144 | — |
| Packhaging | 208-BQFP / 208-RQFP with Exposed Pad | — |
| Bilang ng Pin | 208 | — |
| Speed Grade | -2 (mid-speed, industrial) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | — |
| Supply Voltage (Core) | [DATA_NEEDED: core VCC] | — |
| Supply Voltage (I/O) | 3.3 V (multi-standard I/O) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Altera legacy scheme | — |
| Process Technology | [DATA_NEEDED: process node] | 0.22 um CMOS |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements | — | 8320 cells |
| Embedded Memory | — | 106,496 bits |
| Maximum Operating Frequency | — | 167 MHz |
| User I/O Pins | — | 144 |
| Dedicated Inputs | — | 4 |
| Core Supply Voltage | — | 2.5 V |
| I/O Standard Support | — | LVDS, 1.8V APEX-20KE family |
| Package Type | — | 208-RQFP / BFQFP with exposed pad |
| Terminal Pitch | — | 0.5 mm |
| Hanay ng Temperature na Operasyon | — | 0C to +85C (industrial) |
| Propagation Delay | — | 3.6 ns |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |