EP20K400BC652-2AA vs EP20K400BI652-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400BC652-2AA sa pamamagitan ng Intel at EP20K400BI652-2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400BC652-2AA | EP20K400BI652-2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Product Type | Field-programmable gate array (FPGA) | — |
| Series | APEX-20K | APEX-20KC |
| Number of LABs/CLBs | 1664 | — |
| Number of Logic Elements/Cells | 16640 | — |
| Total RAM Bits | 212992 bit | 212992 |
| Number of I/O | 502 | — |
| Number of Gates | 1052000 | — |
| Volte ng Pagbibigay | 2.375 V to 2.625 V | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to 85 °C (TJ) | [DATA_NEEDED: operating temperature grade] |
| Packhaging | 652-BGA | 652-BGA (45 x 45 mm) |
| Supplier Device Package | 652-BGA (45x45) [DATA_NEEDED: target-device package dimensions] | — |
| Part Status | Obsolete | — |
| Configuration Memory Technology | [DATA_NEEDED: configuration memory technology] | — |
| Maximum User I/O Frequency | [DATA_NEEDED: maximum user I/O frequency] | — |
| Core Logic Voltage | [DATA_NEEDED: core logic voltage] | — |
| Typical Supply Current | [DATA_NEEDED: typical supply current] | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20K |
| Logic Elements / Cells | — | 16640 |
| System Gates | — | 400000 |
| Number of Logic Array Blocks (LABs) | — | 502 |
| User I/O Count | — | 502 (max per family) |
| Number of I/O Banks | — | 8 |
| Core Voltage | — | 1.71 V to 1.89 V |
| I/O Voltage Reference | — | 2.5 V (LVDS support) |
| Maximum Frequency | — | 200 MHz |
| Process Technology | — | 0.22 µm CMOS |
| Pin-to-Pin Delay (Tpd) | — | 3.1 ns |