EP20K400CB652I7 vs EP20K600CB652C7E5 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652I7 sa pamamagitan ng Altera at EP20K600CB652C7E5 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K400CB652I7 EP20K600CB652C7E5
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KC APEX 20KC
Device Family Field-Programmable Gate Array (FPGA) —
Typical Gates 400,000 —
Logic Elements (LEs) 16,640 —
Maximum Operating Frequency 375.94 MHz —
Process Technology 0.15 µm CMOS 0.15 um CMOS
Core Supply Voltage 1.8 V —
I/O Supply Voltage 1.8 V / 3.3 V —
Packhaging BGA-652 (652-ball) 652-ball FineLine BGA
Package Code (JESD-30) S-PBGA-B652 —
Terminal Form Ball —
Package Shape Square —
Maximum User I/O Pins [DATA_NEEDED: max user I/O] —
Embedded Memory Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM —
Configuration Method SRAM + JTAG (ISP) —
Speed Grade 7 7 (-1 speed bin equivalent, E5 suffix)
Temperature Grade Industrial (-40 °C to +100 °C) —
Tindminan RoHS Non-compliant (JESD-609 e0, contains lead) [DATA_NEEDED: RoHS compliance status]
Manufacturer Status Obsolete (Intel/Altera legacy FPGA) —
Typical Gate Count — 600K gates
Logic Elements / Macros — 24,320
Maximum User I/O — 488
Embedded Memory (EAB bits) — 311,296 bits
Core Voltage — 1.8 V
Temperature na Operasyon — 0C to +85C (commercial, suffix C7)
PLL Count — 4
Supported I/O Standards — LVTTL, LVCMOS, PCI, SSTL, HSTL
Configuration Scheme — Passive Serial / JTAG / EPC16 / EPC8
Katayuan ng Lifecycle — Obsolete - last time buy has passed

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