EP20K400CB652I7 vs EP20K600CB652C7E5 比較
詳細並排比較 EP20K400CB652I7 由 Altera 與 EP20K600CB652C7E5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400CB652I7 | EP20K600CB652C7E5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Device Family | Field-Programmable Gate Array (FPGA) | — |
| Typical Gates | 400,000 | — |
| Logic Elements (LEs) | 16,640 | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage | 1.8 V / 3.3 V | — |
| 封裝 | BGA-652 (652-ball) | 652-ball FineLine BGA |
| Package Code (JESD-30) | S-PBGA-B652 | — |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Embedded Memory | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM | — |
| Configuration Method | SRAM + JTAG (ISP) | — |
| Speed Grade | 7 | 7 (-1 speed bin equivalent, E5 suffix) |
| Temperature Grade | Industrial (-40 °C to +100 °C) | — |
| RoHS 狀態 | Non-compliant (JESD-609 e0, contains lead) | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer Status | Obsolete (Intel/Altera legacy FPGA) | — |
| Typical Gate Count | — | 600K gates |
| Logic Elements / Macros | — | 24,320 |
| Maximum User I/O | — | 488 |
| Embedded Memory (EAB bits) | — | 311,296 bits |
| Core Voltage | — | 1.8 V |
| 工作溫度 | — | 0C to +85C (commercial, suffix C7) |
| PLL Count | — | 4 |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL, HSTL |
| Configuration Scheme | — | Passive Serial / JTAG / EPC16 / EPC8 |
| 生命週期狀態 | — | Obsolete - last time buy has passed |