EP20K400CB652I9 vs EP20K400CB652C9ES Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400CB652I9 sa pamamagitan ng Altera at EP20K400CB652C9ES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K400CB652I9 EP20K400CB652C9ES
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Family APEX 20KC APEX 20KC
Logic Elements 16,640 cells —
System Gates 400,000 —
Maximum User I/O 488 —
Embedded Memory Bits 212,992 bits —
Embedded System Blocks (ESBs) 104 —
Process Technology 0.15 um CMOS 0.15 µm CMOS
Core Voltage 1.8 V 1.8 V
Maximum Frequency 250 MHz —
Packhaging 652-pin LBGA (CB) —
Maximum Seated Height 1.63 mm —
Temperature na Operasyon -40C to +85C (industrial, 'I' grade) —
Speed Grade -9 —
Total Terminals 652 —
Tindminan RoHS [DATA_NEEDED: RoHS compliance verification] [DATA_NEEDED: RoHS status]
Series — APEX 20KC
Logic Elements / Cells — 16640
Total System Gates — 400000
Embedded Memory (Bits) — 212992
Number of User I/O — 488
Number of LABs/CLBs — [DATA_NEEDED: LAB count]
Number of Logic Array Blocks — 1040
Maximum Operating Frequency — 250 MHz
Hanay ng Temperature na Operasyon — 0°C to +85°C (Commercial)
Uri ng Pagpapasok — Surface Mount
Packhaging / Kaso — 652-BGA
Level ng MSL — 3 (168 Hours)
Packaging — Tray
Programmability Type — In-system programmable (SRAM-based)
I/O Standards Supported — LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL
JTAG (IEEE 1149.1) — Yes
PLL — Yes (4-phase)

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