EP20K400FI672-3N vs EP20K400EFC672-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400FI672-3N sa pamamagitan ng Altera at EP20K400EFC672-3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400FI672-3N | EP20K400EFC672-3N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Unknown | NRND |
| Device Type | CMOS loadable programmable logic device | FPGA - Field Programmable Gate Array |
| Product Family | APEX 20K | — |
| Series | EP20K400 | APEX 20K |
| Propagation Delay | 3.6 ns | 2.5 ns |
| Maksimum na Taktiko ng Oras | 833 MHz | — |
| User I/O Count | 502 | — |
| Nominal Supply Voltage | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | — |
| Packhaging | S-PBGA-B672 | 672-BBGA (FC-FBGA) |
| Terminal Count | 672 terminals | — |
| Terminal Pitch | 1.000 mm | — |
| Uri ng Pagpapasok | Surface mount | — |
| Logic Capacity | [DATA_NEEDED: logic capacity] | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C (commercial) |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Tindminan RoHS | unknown | [DATA_NEEDED: specific RoHS status - likely non-compliant given part age] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20KE |
| System Gates | — | 1,052,000 |
| Logic Elements | — | 16,640 |
| Logic Array Blocks (LABs) | — | 1,664 macros |
| Embedded RAM (EAB/ESB bits) | — | 212,992 bits |
| User I/O Pins | — | 488 |
| Bilang ng Pin | — | 672 |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Supply Voltage | — | 2.5 V |
| Speed Grade | — | -3 |
| Technology | — | CMOS, 0.18 µm (per APEX 20KE family) |
| PLL Count | — | 4 |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |