EP20K400GC655-1V vs EP20K400GC655-3X Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-1V sa pamamagitan ng Altera at EP20K400GC655-3X sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K400GC655-1V EP20K400GC655-3X
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KE APEX 20K (MultiCore architecture, LUT + product-term + embedded memory)
Logic Elements 16,640 —
Typical Gate Count 400,000 gates —
Embedded Memory 212,992 bits —
Maximum User I/O 496 —
Dedicated Inputs 6 —
Packhaging CBGA-655 (Ceramic Ball Grid Array) —
Total Terminals 655 —
Supply Voltage (Core) 2.375 V to 2.625 V (nominal 2.5 V) —
Propagation Delay 2.5 ns —
Maximum Internal Frequency 250 MHz (-1V speed grade) 167 MHz (speed grade -3)
Process Technology 0.22 µm CMOS 0.22 µm CMOS
LVDS Support Yes —
Moisture Sensitivity Level MSL 1 —
Peak Reflow Temperature 220 °C —
Qualification Not Qualified —
Programming Interface IEEE 1532 / JTAG —
Series — APEX-20KC
Manufacturer — Altera (now Intel FPGA)
Logic Elements / Cells — 16,640
System Gates — 400,000
Total RAM Bits — 212,992 bits
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Supply Voltage (VCCIO) — 2.5 V (LVDS support per APEX 20KE datasheet)
Packhaging / Kaso — 655-BCPGA (CPGA655, 62.48 x 62.48 mm)
Uri ng Pagpapasok — Through-Hole (CPGA, ceramic)
Temperature na Operasyon — [DATA_NEEDED: operating temperature range]
Speed Grade — -3 (fastest)
Suffix Code — -X (extended / ceramic CPGA variant)
I/O Count — [DATA_NEEDED: max user I/O]
JTAG / Boundary Scan — IEEE 1149.1 (per APEX 20K family)
Tindminan RoHS — [DATA_NEEDED: RoHS status - ceramic CPGA historically non-RoHS]

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita