EP20K400GC655-2X vs EP20K400PI655-2X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-2X sa pamamagitan ng Altera at EP20K400PI655-2X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400PI655-2X - APEX 20K 400K Gates FPGA, 655-Pin PQFP | Intel / Altera
EP20K400PI655-2X ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400GC655-2X | EP20K400PI655-2X |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20K |
| Series | APEX-20KC® | — |
| Logic Elements / Cells | 16640 | — |
| System Gates | 400000 | — |
| Total RAM Bits | 212992 | — |
| Number of I/O | 496 | — |
| Number of Dedicated Inputs | 6 | — |
| Number of LABs/CLBs | [DATA_NEEDED: number of Logic Array Blocks] | — |
| Number of EABs | [DATA_NEEDED: number of Embedded Array Blocks] | — |
| Maximum Operating Frequency | 200 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.18 um CMOS |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage (MultiVolt) | 2.5 V / 3.3 V / 5 V | — |
| Package Type | 655-BCPGA (SPGA655) | — |
| Package Body Material | CERAMIC, metal-sealed cofired grid array | — |
| Package Dimensions | 47 x 47 mm | — |
| Peak Reflow Temperature | 220 °C | — |
| Uri ng Pagpapasok | Through-hole (CPGA) | Surface Mount |
| Programmability | In-system, JTAG (IEEE 1149.1) | — |
| Temperature na Operasyon | [DATA_NEEDED: temperature grade] | -40C to +85C (Industrial) |
| Tindminan RoHS | unknown | — |
| Device Series | — | EP20K400 |
| Speed Grade | — | -2X |
| Maximum Logic Elements | — | 16,640 |
| Maximum System Gates | — | 400,000 |
| Maximum RAM Bits | — | 166,400 |
| Embedded System Blocks (ESBs) | — | 104 |
| Maximum User I/O Pins | — | 488 |
| Maximum PLLs | — | 4 |
| Packhaging | — | PQFP-655 (Power Quad Flat Pack) |
| Core Voltage | — | 3.3 V |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| Configuration Method | — | Serial / Parallel / JTAG |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| Katayuan ng Lifecycle | — | Obsolete (legacy Altera APEX 20K family) |