EP20K400GC655-3 vs EP20K400GC655-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-3 sa pamamagitan ng Intel at EP20K400GC655-1 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K400GC655-3 | EP20K400GC655-1 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | APEX-20KC | EP20K400 |
| Family | APEX 20K | APEX 20K |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 16640 | 16,640 |
| Total RAM Bits | 212992 | 212,992 |
| Number of Gates | 400000 | — |
| Supply Voltage - Core | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Voltage Tolerance | MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0 °C to +85 °C (commercial) |
| Maximum Frequency | 167 MHz (per FPGAkey) | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Packhaging / Kaso | 655-BCPGA | — |
| Supplier Device Package | 655-CPGA (62.48 x 62.48 mm) | — |
| Speed Grade | -3 (slowest grade in family) | — |
| Propagation Delay (tPD) | 3.6 ns (per Microchip USA listing) | — |
| JTAG Support | IEEE 1149.1 Boundary-Scan | — |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, Active Serial | Passive Serial, Passive Parallel Async, Passive Parallel Sync |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Non-compliant (contains lead in ceramic package) |
| Maximum Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Embedded System Blocks (ESBs) | — | 4 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 6 |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Maximum Internal Frequency | — | 250 MHz |
| Propagation Delay | — | 2.5 ns |
| Packhaging | — | 655-pin CPGA (Ceramic Pin Grid Array) |
| Bilang ng Pin | — | 655 |
| Uri ng Pagpapasok | — | Through-Hole |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |