EP20K400GC655-3V vs EP20K400GI655-1V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GC655-3V sa pamamagitan ng Intel at EP20K400GI655-1V sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K400GC655-3V | EP20K400GI655-1V |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | APEX-20KC | — |
| Family | APEX 20KC (Apex 20KE Device Family, 1.8 V, LVDS) | APEX 20K |
| Manufacturer | Altera (now Intel) | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | 2.5 V |
| Logic Elements | 16640 | 16,640 |
| Total RAM Bits | 212992 | — |
| Typical Gate Count | 400000 | — |
| Number of User I/O | 496 | — |
| Maksimum na Taktiko ng Oras | 714.2 MHz | — |
| Propagation Delay | 3.6 ns | 2.5 ns |
| Speed Grade | -3V (commercial temperature, Vcc 1.8 V) | — |
| Packhaging | 655-BCPGA (62.48 mm x 62.48 mm) | — |
| Package Equivalence Code | SPGA655, 47x47 | SPGA655, 47x47 |
| Uri ng Pagpapasok | Through Hole (CPGA) | — |
| Peak Reflow Temperature | 220 C | — |
| Process Technology | CMOS | CMOS |
| Configuration | SRAM-based (requires EPC configuration device) | In-system programmable via JTAG |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance flag - BCPGA package often non-RoHS] | [DATA_NEEDED] |
| Temperature na Operasyon | [DATA_NEEDED: commercial / industrial / military grade] | [DATA_NEEDED: industrial vs military grade] |
| Typical Gates | — | 400,000 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 4 |
| Package Type | — | CBGA-655 (Ceramic Ball Grid Array) |
| Package Code (JESD-30) | — | S-CPGA-P655 |
| I/O Supply Voltage | — | 2.5 V / 3.3 V |
| Boundary Scan | — | IEEE 1149.1 JTAG |
| Level ng MSL | — | 1 |
| Package Body Material | — | Ceramic |