EP20K400GI655-2V vs EP20K400GI655-1V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GI655-2V sa pamamagitan ng Intel at EP20K400GI655-1V sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP20K400GI655-2V | EP20K400GI655-1V |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX 20K | APEX 20K |
| Maximum Gates | 400,000 | — |
| Logic Elements | 16,640 | 16,640 |
| Embedded RAM Bits | 212,992 | — |
| User I/O Pins | 496 | — |
| Dedicated Inputs | 6 | 4 |
| Packhaging | SPGA-655 (ceramic, 47 x 47 mm) | — |
| Package Equivalence Code | SPGA655,47X47 | SPGA655, 47x47 |
| Process Technology | 0.18 µm CMOS | CMOS |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | 2.5 V |
| I/O Supply Voltage | 3.3 V | 2.5 V / 3.3 V |
| Propagation Delay | 3.0 ns to 3.1 ns | 2.5 ns |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 1 | — |
| Package Body Material | Ceramic | Ceramic |
| Temperature na Operasyon | Industrial (per -2V speed grade) | [DATA_NEEDED: industrial vs military grade] |
| Tindminan RoHS | Non-compliant (ceramic SPGA, contains lead) | [DATA_NEEDED] |
| Typical Gates | — | 400,000 |
| Maximum User I/O | — | 502 |
| Package Type | — | CBGA-655 (Ceramic Ball Grid Array) |
| Package Code (JESD-30) | — | S-CPGA-P655 |
| Configuration | — | In-system programmable via JTAG |
| Boundary Scan | — | IEEE 1149.1 JTAG |
| Level ng MSL | — | 1 |