EP20K400GI655-2V vs EP20K400GI655-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K400GI655-2V sa pamamagitan ng Intel at EP20K400GI655-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K400GI655-2V | EP20K400GI655-3 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20K | APEX 20KE |
| Maximum Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Embedded RAM Bits | 212,992 | — |
| User I/O Pins | 496 | — |
| Dedicated Inputs | 6 | 4 |
| Packhaging | SPGA-655 (ceramic, 47 x 47 mm) | 655-Pin PGA (Plastic/CPGA, square) |
| Package Equivalence Code | SPGA655,47X47 | — |
| Process Technology | 0.18 µm CMOS | CMOS, 2.5V core |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | 2.5 V |
| I/O Supply Voltage | 3.3 V | 2.5 V or 3.3 V (MultiVolt I/O) |
| Propagation Delay | 3.0 ns to 3.1 ns | — |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 1 | — |
| Package Body Material | Ceramic | — |
| Temperature na Operasyon | Industrial (per -2V speed grade) | 0°C to 70°C (Industrial I grade) |
| Tindminan RoHS | Non-compliant (ceramic SPGA, contains lead) | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 (maximum) |
| Maximum User I/O | — | 502 |
| Number of Terminals | — | 655 |
| JESD-30 Code | — | S-CPGA-P655 |
| Package Shape | — | Square |
| Form of Terminal | — | PIN/PEG (through-hole) |
| Uri ng Pagpapasok | — | Through-Hole (Socket) |
| Speed Grade | — | -3 (slowest of the EP20K400 family) |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous, JTAG |
| Embedded Memory | — | Dual-port RAM via Embedded System Blocks (ESBs) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |