EP20K600CB652C8N vs EP20K600CB652C9 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB652C8N sa pamamagitan ng Altera at EP20K600CB652C9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CB652C8N EP20K600CB652C9
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family APEX 20KC APEX 20KC
Device Type Loadable PLD / FPGA —
System Gates 600,000 1,537,000
Logic Elements 24,320 cells —
Embedded Memory 311,296 bits —
User I/O Pins 488 —
Dedicated Inputs 4 —
Outputs 480 —
Propagation Delay (typ.) 1.48 ns 1.48 ns
Pin-to-Pin Timing 1.78 ns —
Internal Frequency (typ.) 301.21 MHz —
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) —
Process Technology 0.18 µm all-layer copper-metal 0.15 µm all-layer copper CMOS
Speed Grade C8 —
Temperature na Operasyon 0 °C to 85 °C (commercial) 0 °C to 85 °C (commercial)
Packhaging 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch 652-BGA (45 × 45 mm, 1.27 mm pitch)
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount (BGA)
Architecture MultiCore LUT + Embedded System Blocks (ESB) —
Pin-Compatible With APEX 20KE family —
Tindminan RoHS unknown Compliant (per Altera product page)
Logic Elements / Cells — 24,320
Number of LABs / CLBs — 2,432
Total RAM Bits — 311,296
User I/O — 488
Number of I/O Banks — [DATA_NEEDED: I/O bank count]
Volte ng Pagbibigay — 1.71 V to 1.89 V
Internal Datapath Frequency — up to 250 MHz
Configuration — JTAG IEEE 1149.1 / serial / EPC2-compatible
Product Status — Obsolete (per distributor listings)

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