EP20K600CB672C8 vs EP20K600CEF672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CB672C8 sa pamamagitan ng Intel at EP20K600CEF672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP20K600CB672C8 - APEX 20KC FPGA 600K Gates 672-FBGA | Intel / Altera
EP20K600CB672C8 ObsoletePagsanggunian na paghahambing
| Parametro | EP20K600CB672C8 | EP20K600CEF672C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | APEX 20KC | APEX 20KC |
| Family | APEX-20KC® | APEX 20KC (Enhanced Configuration) |
| Number of Logic Elements/Cells | 24320 | — |
| Total RAM Bits | 311296 | — |
| Number of I/O | 508 | — |
| Number of Gates | 600000 | — |
| Voltage - Supply | 1.71 V to 1.89 V (core); 3.0 V to 3.6 V (I/O) | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial) |
| Packhaging / Kaso | 672-BBGA, FCBGA (27 x 27 mm) | — |
| Supplier Device Package | 672-FBGA (27 x 27) | — |
| Speed Grade | C8 (approx. 301 MHz internal) | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS, all-layer copper |
| PLLs | 4 | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, GTL+, PCI 3.3 V | — |
| Tindminan RoHS | Unknown (legacy part, pre-RoHS era) | [DATA_NEEDED: RoHS status] |
| Lead Free | Unknown | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA / Loadable PLD |
| Logic Elements / Cells | — | 24,320 |
| Gate Count (typical) | — | 600,000 gates |
| Maximum Operating Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.48 ns (typ) |
| User I/Os | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Packhaging | — | 672-ball FineLine BGA (FC-FBGA) |
| Package Code | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Configuration | — | SRAM-based, serial or parallel (EPC) |
| Embedded Memory | — | EAB blocks (dual-port RAM with byte enables) |
| LVDS Support | — | True-LVDS channels integrated |
| MultiVolt I/O | — | 1.8 V, 2.5 V, 3.3 V interfaces |
| External Memory Interface | — | DDR SDRAM, QDR SRAM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |