EP20K600CF33C7N vs EP20K600CF33C9 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF33C7N sa pamamagitan ng Intel at EP20K600CF33C9 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP20K600CF33C7N EP20K600CF33C9
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Series APEX-20K —
Family APEX 20KC APEX 20KC
Logic Elements / Cells 24320 24,320
Total Gates 600000 —
Total RAM Bits 311296 —
Number of I/O [DATA_NEEDED: number of user I/O] —
Number of PLLs 4 —
Pin-to-Pin Logic Delay (tPD) 1.48 ns —
Max Operating Frequency 375.94 MHz —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Supply Voltage (VCCINT) 1.8 V (1.71 V to 1.89 V) 1.8 V nominal (1.71 V to 1.89 V)
Supplier Device Package 1020-FBGA (33 x 33 mm) —
Packhaging / Kaso 1020-BBGA, FCBGA —
Uri ng Pagpapasok Surface Mount Surface Mount (BGA)
Tindminan RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Temperature na Operasyon 0 °C to 85 °C (commercial, based on speed grade C7) —
System Gates — 600,000 (maximum)
Maximum Operating Frequency — 250 MHz
Maksimum na Taktiko ng Oras — 303.03 MHz
Propagation Delay — 2.0 ns
User I/O — 588 (4 dedicated inputs + 580 general-purpose I/O)
Packhaging — 1020-ball FC-FBGA
Hanay ng Temperature na Operasyon — [DATA_NEEDED: operating temperature range]
Embedded RAM — Dual-port RAM blocks (per family)
Programmability — JTAG / IEEE 1149.1 ISP, SRAM-based
Level ng MSL — [DATA_NEEDED: MSL level]
Logic Block Architecture — MultiCore (LUT + product-term + embedded memory)
I/O Standards Supported — LVTTL, LVCMOS, LVDS (per family datasheet)

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