EP20K600CF33C7N vs EP20K600CF33C9 比較

詳細並排比較 EP20K600CF33C7N 由 Intel 與 EP20K600CF33C9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF33C7N EP20K600CF33C9
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series APEX-20K —
Family APEX 20KC APEX 20KC
Logic Elements / Cells 24320 24,320
Total Gates 600000 —
Total RAM Bits 311296 —
Number of I/O [DATA_NEEDED: number of user I/O] —
Number of PLLs 4 —
Pin-to-Pin Logic Delay (tPD) 1.48 ns —
Max Operating Frequency 375.94 MHz —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Core Supply Voltage (VCCINT) 1.8 V (1.71 V to 1.89 V) 1.8 V nominal (1.71 V to 1.89 V)
Supplier Device Package 1020-FBGA (33 x 33 mm) —
封裝 / 外殼 1020-BBGA, FCBGA —
安裝類型 Surface Mount Surface Mount (BGA)
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
工作溫度 0 °C to 85 °C (commercial, based on speed grade C7) —
System Gates — 600,000 (maximum)
Maximum Operating Frequency — 250 MHz
最大時脈頻率 — 303.03 MHz
Propagation Delay — 2.0 ns
User I/O — 588 (4 dedicated inputs + 580 general-purpose I/O)
封裝 — 1020-ball FC-FBGA
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
Embedded RAM — Dual-port RAM blocks (per family)
Programmability — JTAG / IEEE 1149.1 ISP, SRAM-based
MSL 等級 — [DATA_NEEDED: MSL level]
Logic Block Architecture — MultiCore (LUT + product-term + embedded memory)
I/O Standards Supported — LVTTL, LVCMOS, LVDS (per family datasheet)

資料表與資源

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