EP20K600CF672C-7 vs EP20K600CF672C6 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C-7 sa pamamagitan ng Altera at EP20K600CF672C6 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672C-7 | EP20K600CF672C6 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | APEX 20KC | — |
| Typical Gates | 600,000 | — |
| Logic Elements | 24,576 | — |
| Maximum User I/O | 508 | — |
| Embedded Memory (ESB) | 311 kbits | — |
| Number of Terminals | 672 | — |
| Package Type | 672-BBGA, FCBGA | — |
| Package Dimensions | 45 x 45 mm | — |
| Ball Pitch | 1.27 mm | — |
| Process Technology | 0.18 µm all-layer copper-metal (APEX 20KC) | 0.18 µm CMOS, 6 metal layers |
| Speed Grade | -7 | -6 (C6) |
| Propagation Delay | 1.48 ns | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | 0 °C to +85 °C (commercial) |
| Configuration Interface | EPC (Enhanced Configuration) device family | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free/RoHS status not stated in verified web data] | — |
| Family | — | APEX 20KC |
| Typical Gate Count | — | 600,000 gates |
| Logic Elements (LEs) | — | 24,320 |
| Embedded System Blocks (ESBs) | — | 160 (each 2,048 bits) |
| Maximum Embedded RAM | — | 311,296 bits (311 kbit) |
| Maximum User I/O Pins | — | 508 |
| Packhaging | — | 672-ball FineLine BGA (CF672) |
| Package Body Size | — | 27 mm × 27 mm |
| Core Voltage | — | 1.8 V |
| I/O Standards Supported | — | LVCMOS, LVTTL, HSTL, SSTL, GTL+ |
| Embedded PLLs | — | 4 |
| Configuration Method | — | SRAM-based, JTAG, EPC16/EPC2 |
| Tindminan RoHS | — | Non-RoHS (legacy process) |