EP20K600CF672C6 vs EP20K600CF672C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672C6 sa pamamagitan ng Altera at EP20K600CF672C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672C6 | EP20K600CF672C7 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX 20KC | APEX-20KC |
| Typical Gate Count | 600,000 gates | — |
| Logic Elements (LEs) | 24,320 | — |
| Embedded System Blocks (ESBs) | 160 (each 2,048 bits) | — |
| Maximum Embedded RAM | 311,296 bits (311 kbit) | — |
| Maximum User I/O Pins | 508 | — |
| Packhaging | 672-ball FineLine BGA (CF672) | 672-ball FC-FBGA (27x27 mm) |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | -6 (C6) | C7 |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | 0C to 85C (commercial) |
| Core Voltage | 1.8 V | — |
| I/O Standards Supported | LVCMOS, LVTTL, HSTL, SSTL, GTL+ | — |
| Embedded PLLs | 4 | — |
| Process Technology | 0.18 µm CMOS, 6 metal layers | 0.15 um CMOS, all-layer copper |
| Configuration Method | SRAM-based, JTAG, EPC16/EPC2 | — |
| Tindminan RoHS | Non-RoHS (legacy process) | Compliant |
| Device Type | — | SPLD / FPGA |
| System Gates | — | 600,000 |
| Logic Cells | — | 24,320 |
| User I/O | — | 508 |
| Ball Pitch | — | 1.27 mm |
| Core Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| Propagation Delay (typ.) | — | 1.48 ns |
| Embedded Memory | — | Dual-port RAM via ESBs |
| CAM Support | — | Yes (ESB-based content-addressable memory) |
| Uri ng Pagpapasok | — | Surface Mount |