EP20K600CF672I7N vs EP20K600CF672I8AA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP20K600CF672I7N sa pamamagitan ng Intel at EP20K600CF672I8AA sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP20K600CF672I7N | EP20K600CF672I8AA |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | APEX 20KC | — |
| Technology | 0.15 µm CMOS | 0.15 um CMOS |
| Maximum System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum User I/O Pins | 508 | — |
| Maximum Internal Frequency | 376 MHz | — |
| Embedded System Blocks (ESBs) | 160 | — |
| Total Embedded RAM (max) | 311,296 bits | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt, bank-dependent) | — |
| Packhaging | 672-ball FineLine BGA (FC-FBGA) | 672-FBGA (27 x 27 mm) |
| Ball Pitch | 1.0 mm | — |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | I7 (-40 °C to +100 °C industrial) | I8 |
| Propagation Delay (typical) | 1.6 ns | — |
| Configuration Method | JTAG (IEEE 1149.1) + EPC configuration device | — |
| Lead-Free Finish (N suffix) | Yes | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 24,320 |
| Total Gates | — | 600,000 (system gates) |
| Total RAM Bits | — | 311,296 |
| Number of I/O | — | 508 |
| Number of LABs/CLBs | — | 1,520 |
| Volte ng Pagbibigay | — | 1.71 V to 1.89 V |
| Uri ng Pagpapasok | — | Surface Mount |
| Temperature na Operasyon | — | -40C to +85C (industrial) |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL, SSTL-2/3, HSTL, LVDS, LVPECL |
| Number of PLLs | — | 4 |
| Lead Free | — | Yes |
| Number of Logic Array Blocks | — | 1,520 (40 LABs per MegaLAB) |