EP2A25F672I-9 vs EP2A25F672C9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A25F672I-9 sa pamamagitan ng Intel at EP2A25F672C9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A25F672I-9 | EP2A25F672C9 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | APEX II | APEX II |
| Logic Elements (typical) | 25,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | — |
| Embedded System Blocks (ESB) Memory | 1,125 Kbits | — |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O pins] | — |
| Number of PLLs | 4 | — |
| Process Technology | 0.18 µm CMOS | 0.15 µm all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V / 1.8 V (speed-grade dependent) | — |
| Operating Temperature Grade | Industrial (-40 °C to +100 °C junction) | — |
| Speed Grade | -9 | — |
| Packhaging | 672-pin FCBGA (FineLine BGA) | 672-ball FCBGA (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 (per Vyrian listing) | — |
| Peak Reflow Temperature | 220 °C (per Vyrian listing) | — |
| Configuration Method | JTAG / serial configuration EPROM | — |
| Supported I/O Standards | LVTTL, LVCMOS, LVDS, PCI | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED] |
| Legacy Status | Obsolete - consult Altera / Intel FPGA archive for documentation | — |
| Logic Elements (LE) | — | Approximately 25,000 |
| Macro Cells | — | 2432 |
| User I/O | — | 492 |
| Package Dimensions | — | 27 mm x 27 mm |
| Ball Pitch | — | 1.0 mm |
| Logic Family | — | CMOS |
| Propagation Delay | — | 1.69 ns |
| Temperature na Operasyon | — | 0°C to 85°C (Commercial) |
| Volte ng Pagbibigay | — | [DATA_NEEDED: core VCC voltage] |
| I/O Standards | — | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) |
| Configuration | — | Passive Serial, Passive Parallel Synchronous, JTAG |
| Embedded Memory | — | ESBs for dual-port RAM, ROM, FIFO |