EP2A25F672I8N vs EP2A25F672C9N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A25F672I8N sa pamamagitan ng Intel at EP2A25F672C9N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2A25F672I8N - APEX II FPGA 900K Gates 672-BGA | Intel / Altera
EP2A25F672I8N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2A25F672I8N | EP2A25F672C9N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | APEX II | APEX II |
| Device | EP2A25 | — |
| Logic Elements | 24,320 | — |
| Gates | 900,000 | — |
| Embedded Memory (bits) | 622,592 | — |
| User I/Os | 492 | — |
| Packhaging | 672-ball FC-FBGA (FineLine BGA) | 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch |
| Package Size | 27 x 27 mm | — |
| Ball Pitch | 1 mm | — |
| Process Technology | 0.15 µm all-layer copper-metal | 0.15 µm all-layer copper, up to 8 metal layers |
| Metal Layers | Up to 8 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| Internal Frequency (max) | 333 MHz | — |
| Propagation Delay | 1.69 ns | 2.23 ns |
| Temperature na Operasyon | 0 °C to 85 °C | 0 °C to +85 °C (commercial, C9 grade) |
| Logic Family | CMOS | CMOS |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport |
| Configuration Method | SRAM-based (Altera Quartus II) | — |
| Tindminan RoHS | unknown | Compliant (per distributor listings) |
| Lead-Free | unknown | — |
| Logic Elements / Cells | — | 24320 |
| System Gates | — | Approx. 900000 |
| Maximum User I/O | — | 492 |
| Operating Frequency | — | 236 MHz |
| Core Supply Voltage (VCCINT) | — | 1.425 V to 1.575 V (nominal 1.5 V) |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Seated Height (max) | — | 2.100 mm |
| LVDS Data Rate | — | Up to 1 Gbps (True-LVDS) |
| Configuration Interface | — | Serial / Parallel PROM, JTAG, passive parallel (enhanced) |
| Embedded Memory | — | Enhanced System Blocks (ESBs) for dual-port RAM |
| Design Software | — | Quartus II (v5.1 or later) |