EP2A40F672C7ES vs EP2A40F672C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672C7ES sa pamamagitan ng Intel at EP2A40F672C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672C7ES | EP2A40F672C6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 38400 | 40,000 |
| Typical Gates | 1.5 M | — |
| Maximum Logic Elements | 40960 | — |
| Maximum Macro Cells | 2560 | — |
| Maximum User I/O | 492 | — |
| Maximum Operating Frequency | 562 MHz | — |
| Process Technology | 0.15 µm CMOS | SRAM-based, 0.18 um (per family datasheet) |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 3.3 V | — |
| Packhaging | 672-pin FC-FBGA (FineLine BGA) | 672-ball FineLine BGA |
| Package Dimensions | 27 × 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| Speed Grade | 7 | C6 (per part number suffix) |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | Commercial (0C to +85C) |
| Status Code | ES (Engineering Sample) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| Core Voltage | — | 1.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |