EP2A40F672C9ES vs EP2A40F672C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A40F672C9ES sa pamamagitan ng Altera at EP2A40F672C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A40F672C9ES | EP2A40F672C8 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| System Gates | 1,500,000 | — |
| Maximum User I/O | 492 | — |
| Operating Frequency (max) | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15-micron all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | — |
| Packhaging | 672-pin FC-FBGA | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Speed Grade | -9 | — |
| Configuration Modes | PS, PPS, PPA, JTAG, FPP | — |
| Embedded Memory (ESB) | Yes (RAM/ROM/CAM) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Tindminan RoHS | unknown | — |
| Logic Family | — | CMOS |
| Typical Logic Elements (LEs) | — | 40,000 |
| Embedded Memory | — | Up to 1.5 Mbits |
| User I/Os | — | 492 pins |
| Bilang ng Pins | — | 672 |
| Package Type | — | FineLine BGA, 27 x 27 mm, 1.0 mm pitch |
| Propagation Delay (speed grade C8) | — | 1.55 ns |
| Temperature na Operasyon | — | 0 C to 85 C (commercial) |
| Phase-Locked Loops (PLLs) | — | 4 |
| LVDS Signaling Support | — | Up to 1 Gbps |
| Multipliers | — | Embedded multiplier blocks |